Updated 10-15-07.  Updated for DDS Rev A.  Reposition connectors for .5 inch spacing.  Changed input to Squaring Circuit from using J3 to using J2.
Updated 4-30-08.  Updated for DDS Rev B.
Updated 6-13-08.  Updated for DDS Rev C. Resistor value change, R14 from 49.9 to 33 ohm.
Updated 7-23-09.  Updated for DDS Rev D. Addition of low pass filter in squaring circuit.
Updated 8-11-09.  Update information, add revision history. Note that AD9851 is an optional replacement for AD9850.
Updated 4-22-09.  Update page with more information.

SLIM-DDS-107, Direct Digital Synthesizer, size-B
Use your mouse's "right click" and "Save Link" to download:
a.  SKSLIM-DDS-107 Rev D, Schematic, in ExpressPCB software.
b.  PWB-DDS Rev C, Base artwork for PWB, in ExpressPCB software.  Use this drawing to order the pwb from Express, or to locate the parts on the Board.
c.  PLSLIM-DDS-107 Rev D, Parts List for SLIM Control Board, in .txt format.  Open with Exel or Lotus, etc.

    The SLIM-DDS-107 is designed and configured with a filter and squaring circuit in the DDS A path.  The filter shown is 10.7 MHz with a 15 KHz bandwidth.  The squaring circuit of U3 will output a CMOS level, capable of driving a 50 ohm line (J4).  J2 is not used when in the squaring circuit is configured.  J3 output is an unfiltered output of the DDS B and will contain all harmonics and aliases of a normal DDS output.  Its output power level is approximately -8 dBm.
    For best results, the Clock Input at J1 should be a 5 volt peak to peak square wave, but it will operate at a much lower input.  R3 determines the input impedance of the module.  It can be removed for a high impedance input, or changed to any value.  The input clock frequency must be between 1 MHz and 125 MHz, although the AD9850 is somewhat underrated.
    The DDS module is configured for parallel commanding.  However, serial commanding can still be accomplished with appropriate commands on the connector, P1.  The resistors R11 and R12 do not interfere with parallel commanding, because BD1 and BD2 are driven by a "hard" signal.
    In the serial mode, BD0 through BD6 do not need to be connected to external driving signals. But, they must not be left to "float".  R11 is a pull-up and the outside harness should have pin 3 and pin 6 tied together.  This creates a "1" on BD0 and BD1.  R12 is a pull-down and the outside harness should have pins 4,5,10,11, and 12 tied together. This creates a "0" on BD2, BD3, BD4, BD5, and BD6. This is the signal condition required for the AD9850 to operate in the serial mode.  This leaves pin 9, BD7 (D7) to be serially driven, along with WCLK and FQUD.
    The AD9851 is an optional replacement for the AD9850.  Its clock rate limit is 180 MHz.  It has an internal clock multiplier of x6.  It is not advertised nor guaranteed, but the AD9850 also has an internal clock multiplier of x4.

Revision History:
Revision 0: Original Release 8-17-07
SLIM-DDS-107 Rev 0,
Schematic: SKSLIM-DDS-107 Rev 0, Released 8-17-07, archived
PWB: PWB-DDS Rev 0, Released 8-17-07, archived
Parts List: PLSLIM-DDS-107 Rev 0, not archived

Revision A: Released 10-15-07
SLIM-DDS-107 Rev A,
Schematic: SKSLIM-DDS-107 Rev A, Released 10-15-07, archived
PWB: PWB-DDS Rev A, Released 10-15-07, archived
Parts List: PLSLIM-DDS-107 Rev A, not archived

Revision B: Revised 4-24-08
SLIM-DDS-107 Rev B,
Schematic: SKSLIM-DDS-107 Rev B, Revised 4-24-08, archived
PWB: PWB-DDS Rev B, Revised 4-24-08, archived
Parts List: PLSLIM-DDS-107 Rev B, Revised 4-24-08, archived
Change to schematic, PWB, and parts list.
    After the first SLIM-DDS-107 was built and tested, it was determined that the filter and squaring circuit had higher than normal spurious content. This was attributed to a layout problem.  Therefore, Revision B made changes to reposition components and add an internal fence to eliminate proximity effects.
  The previous SLIM-DDS-107, Revision A, should be modified for the new internal fence if it is used in the MSA.

Revision C: Revised 6-11-08
SLIM-DDS-107 Rev C,
Schematic: SKSLIM-DDS-107 Rev C, Revised 6-11-08, archived
PWB: PWB-DDS Rev B,
Parts List: PLSLIM-DDS-107 Rev C, Revised 6-11-08, archived
Change schematic and parts list: Changed R14 from 49.9 ohm to 33 ohm, for best source impedance.

Revision D: Revised 7-23-09
SLIM-DDS-107 Rev D, current version
Schematic: SKSLIM-DDS-107 Rev D, Revised 7-23-09, current version
PWB: PWB-DDS Rev C, Revised 7-23-09, current version
Parts List: PLSLIM-DDS-107 Rev D, Revised 7-23-09, current version
Change to schematic, PWB, and parts list.
    Adds a low pass filter on the output of the Squaring Circuit to reduce spurious emissions.
    Add C34, a 33 pf, to the output of U3.  This reduces the risetime of the 10.7 MHz clock output.
    Add C35, a 33 pf, and L3, a 330 nH.  This creates a cut off frequency of about 60 MHz.

SK-DDS-107, Schematic, Revision D