SLIM-DDS-107 rev C
DDS with Squarer
Updated
10-15-07. Updated for DDS Rev
A.
Reposition connectors for .5 inch spacing. Changed input to
Squaring Circuit from using J3 to using J2.
Updated
4-30-08. Updated for DDS Rev B.
Updated
6-13-08. Updated for DDS Rev C. Resistor value
change, R14 from 49.9 to 33 ohm.
SLIM-DDS-107,
Direct Digital Synthesizer,
size-B
Use your mouse's "right click" and "Save Link" to download:
a. SKSLIM-DDS-107
rev C,
Schematic, in ExpressPCB software.
b. PWB-DDS rev B,
Base artwork for PWB, in ExpressPCB software.
Use this drawing to order the pwb from Express, or to locate
the parts on the Board.
c. PLSLIM-DDS-107 rev C, Parts
List for SLIM Control
Board, in .txt format. Open with Exel or Lotus, etc.
The SLIM-DDS-107
is
designed and configured with a
filter and squaring circuit in the DDS A path. The
filter shown is
10.7 MHz with a 15 KHz bandwidth. The squaring circuit
will output a
CMOS level, capable of driving a 50 ohm line (J4). J2 is not used
when in
the squaring configuration. J3 output is an unfiltered
output of
the DDS B and will contain all harmonics and aliases of a normal DDS
output. The output power level is approximately -8 dBm.
For best results, the Clock Input at J1 should be a
5 volt peak
to peak square wave. R3 determines the input impedance of the
module. It can be removed for a high impedance input, or changed
to any value. The input clock frequency must be between 1 MHz and
125 MHz, although the AD9850 is somewhat underrated.
The DDS module is configured for parallel
commanding. However, serial commanding can be accomplished with
appropriate commands on the connector, P1.
In the parallel mode, the resistors R11 and R12 do
absolutely nothing, because BD1 and BD2 are driven by a "hard" signal.
In the serial mode, BD1 and BD2 are not connected to
external driving signals. They are left to "float". R11 is a
pull-up and the outside harness has pin 3 and pin 6 tied
together. This creates a "1" on D0 and D1. R12 is a
pull-down and the outside harness has pins 4,5,10,11, and 12 tied
together. This creates a "0" on D2,D3,D4,D5, and D6. This is the signal
condition required for the AD9850 to operate in the serial mode.
This leaves pin 9, BD7 (D7) to be serially driven, along with WCLK and
FQUD.
Revision B:
After the first SLIM-DDS-107 was built and tested,
it was determined that the filter and squaring circuit had higher than
normal spurious content. This was attributed to a layout problem.
Therefore, Revision B made changes to reposition components and add an
internal fence to eliminate proximity effects.
The previous SLIM-DDS-107, Revision A, must be modified for the
new internal fence.
Revision C:
Changed R14 from 49.9 ohm to 33 ohm, for best source
impedance.
SK-DDS-107, Schematic, Revision B